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(9) Transfer start
Serial transfer is started by setting transfer data to the serial I/O shift register 0 (SIO0) when the following two
conditions are satisfied.
• Serial interface channel 0 operation control bit (CSIE0) = 1
• Internal serial clock is stopped or SCK0 is at high level after 8-bit serial transfer.
Cautions 1. If CSIE0 is set to "1" after data write to SIO0, transfer does not start.
Upon termination of 8-bit transfer, serial transfer automatically stops and the interrupt request flag (CSIIF0) is
set.
For pins which are to be used for data input/output, be sure to carry out the following settings before serial transfer
of the 1st byte after RESET input.
<1> Set the P25 and P26 output latches to 1.
<2> Set bit 0 (RELT) of the serial bus interface control register (SBIC) to 1.
<3> Reset the P25 and P26 output latches from 1 to 0.
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(10) Distinction method of slave busy state
When device is in the master mode, follow the procedure below to judge whether slave device is in the busy state
or not.
<1> Detect acknowledge signal (ACK) or interrupt request signal generation.
<2> Set the port mode register PM25 (or PM26) of the SB0/P25 (or SB1/P26) pin into the input mode.
<3> Read out the pin state (when the pin level is high, the READY state is set).
After the detection of the READY state, set the port mode register to 0 and return to the output mode.
(11) Cautions on SBI mode
(a) Slave selection/non-selection is detected by match detection of the slave address received after bus release
(b) When detecting selection/non-selection without the use of interrupt with WUP = 0, do so by means of
CHAPTER 15 SERIAL INTERFACE CHANNEL 0 ( µ PD78014 Subseries)
2. Because the N-ch open-drain output must be set to high-impedance at the time of data
reception, write FFH to SIO0 in advance. However, when the wake-up function specification
bit (WUP) = 1, the N-ch open-drain output will always be set to high-impedance. Thus, it
is not necessary to write FFH to SIO0 before reception.
3. If data is written to SIO0 when the slave is busy, the data is not lost.
When the busy state is cleared and SB0 (or SB1) input is set to the high level (READY) state,
transfer starts.
(RELD = 1).
For this match detection, match interrupt request (INTCSI0) of the address to be generated with WUP = 1
is normally used. Thus, execute selection/non-selection detection by slave address when WUP = 1.
transmission/reception of the command preset by program instead of using the address match detection
method.
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