Table of Contents
Advertisement
Figure No.
9-13
9-14
9-15
9-16
10-1
10-2
10-3
11-1
11-2
11-3
12-1
12-2
12-3
12-4
13-1
13-2
www.DataSheet4U.com
13-3
14-1
14-2
14-3
14-4
14-5
14-6
14-7
14-8
14-9
14-10 A/D Conversion End Interrupt Request Generation Timing .............................................................. 261
14-11 AV
15-1
15-2
15-3
15-4
15-5
15-6
15-7
15-8
15-9
15-10 Circuit of Switching in Transfer Bit Order .......................................................................................... 282
Square-Wave Output Operation Timings .......................................................................................... 219
8-Bit Timer Register Start Timings .................................................................................................... 220
External Event Counter Operation Timings ...................................................................................... 220
Timings after Compare Register Change during Timer Count Operation ......................................... 221
Watch Timer Block Diagram ............................................................................................................. 225
Timer Clock Select Register 2 Format .............................................................................................. 226
Watch Timer Mode Control Register Format .................................................................................... 227
Watchdog Timer Block Diagram ....................................................................................................... 233
Timer Clock Select Register 2 Format .............................................................................................. 235
Watchdog Timer Mode Register Format ........................................................................................... 236
Remote Controlled Output Application Example ............................................................................... 239
Clock Output Control Circuit Block Diagram ..................................................................................... 240
Timer Clock Select Register 0 Format .............................................................................................. 241
Port Mode Register 3 Format ............................................................................................................ 242
Buzzer Output Control Circuit Block Diagram ................................................................................... 243
Timer Clock Select Register 2 Format .............................................................................................. 245
Port Mode Register 3 Format ............................................................................................................ 246
A/D Converter Block Diagram ........................................................................................................... 248
A/D Converter Mode Register Format .............................................................................................. 252
A/D Converter Input Select Register Format .................................................................................... 253
A/D Converter Basic Operation ......................................................................................................... 255
Relationship between Analog Input Voltage and A/D Conversion Result ......................................... 256
A/D Conversion by Hardware Start ................................................................................................... 257
A/D Conversion by Software Start .................................................................................................... 258
Example of Method of Reducing Power Dissipation in Standby Mode ............................................. 259
Analog Input Pin Disposition ............................................................................................................. 260
Pin Connection ........................................................................................................................ 261
DD
Serial Bus Interface (SBI) System Configuration Example ............................................................... 265
Serial Bus Configuration Example with 2-Wire Serial I/O ................................................................. 266
Serial Interface Channel 0 Block Diagram ........................................................................................ 268
Timer Clock Select Register 3 Format .............................................................................................. 272
Serial Operating Mode Register 0 Format ........................................................................................ 273
Serial Bus Interface Control Register Format ................................................................................... 274
Interrupt Timing Specification Register Format ................................................................................. 276
3-Wire Serial I/O Mode Timings ........................................................................................................ 281
RELT and CMDT Operations ............................................................................................................ 282
LIST OF FIGURES (3/7)
Title, Page
25
Advertisement
Table of Contents
