Table of Contents
Advertisement
CHAPTER 15 SERIAL INTERFACE CHANNEL 0 ( µ PD78014 Subseries)
(2) Communication operation
The 3-wire serial I/O mode is used for data transmission/reception in 8-bit units. Data transmission/reception
is carried out bit-wise in synchronization of the serial clock.
Shift operation of the serial I/O shift register 0 (SIO0) is carried out at the falling edge of the serial clock (SCK0).
The transmitted data is held in the SO0 latch and is output from the SO0 pin. The received data input to the
SI0 pin is latched in SIO0 at the rising edge of SCK0.
Upon termination of 8-bit transfer, SIO0 operation stops automatically and the interrupt request flag (CSIIF0) is
set.
Figure 15-8. 3-Wire Serial I/O Mode Timings
SCK0
1
2
3
4
5
6
7
8
SI0
DI7
DI6
DI5
DI4
DI3
DI2
DI1
DI0
DO7
DO6
DO5
DO4
DO3
DO2
DO1
DO0
SO0
CSIIF0
End of Transfer
Transfer Start at the falling edge of SCK0
www.DataSheet4U.com
The SO0 pin serves for CMOS output and generates the SO0 latch status. Thus, the SO0 pin output status can
be manipulated by setting bit 0 (RELT) and bit 1 (CMDT) of the serial bus interface control register (SBIC).
However, do not carry out this manipulation during serial transfer.
The SCK0 pin output level is controlled by manipulating the P27 output latch in the output mode (internal system
clock mode) (refer to 15.4.5 SCK0/P27 pin output manipulation).
281
Advertisement
Table of Contents
