NEC 78014Y Series User Manual page 116

F F F F H
F F 2 0 H
F F 1 F H
F F 0 0 H
F E F F H
F E E 0 H
F E D F H
Internal High-Speed RAM
F E 2 0 H
F E 1 F H
F D 0 0 H
F C F F H
F A E 0 H
F A D F H
F A C 0 H
F A B F H
F A 8 0 H
F A 7 F H
www.DataSheet4U.com
4 0 0 0 H
3 F F F H
0 0 0 0 H
116
CHAPTER 5 CPU ARCHITECTURE
Figure 5-13. Data Memory Addressing ( µ PD78012B, 78012BY)
Special Function
Registers (SFR)
256 × 8 bits
General Registers
32 × 8 bits
512 × 8 bits
Use Prohibited
Buffer RAM
32 × 8 bits
Use Prohibited
External Memory
47744 × 8 bits
Internal ROM
16384 × 8 bits
SFR addressing
Register addressing
Short direct
addressing
Direct addressing
Register indirect addressing
Based addressing
Based indexed addressing