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(4) External interrupt mode register (INTM0)
This register sets the valid edge for INTP0 to INTP2.
INTM0 is set with an 8-bit memory manipulation instruction.
RESET input sets INTM0 value to 00H.
Remarks 1. INTP0 is also used for TI0/P00.
Symbol
INTM0
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Caution
CHAPTER 18 INTERRUPT FUNCTIONS AND TEST FUNCTION
2. INTP3 is fixed at falling edge.
Figure 18-5. External Interrupt Mode Register Format
7
6
5
4
ES31
ES30
ES21
ES20
Set the valid edge for INTP0/TI0/P00 after setting bits 1 through 3 (TMC01 to TMC03) of 16-bit timer
mode control register to 000 to stop the timer operation.
3
2
1
0
ES11
ES10
0
0
Address
When Reset
R/W
FFECH
00H
R/W
ES11
ES10
INTP0 Valid Edge Selection
0
0
Falling edge
0
1
Rising edge
1
0
Setting prohibited
1
1
Both falling and rising edges
ES21
ES20
INTP1 Valid Edge Selection
0
0
Falling edge
0
1
Rising edge
1
0
Setting prohibited
1
1
Both falling and rising edges
ES31
ES30
INTP2 Valid Edge Selection
0
0
Falling edge
0
1
Rising edge
1
0
Setting prohibited
1
1
Both falling and rising edges
455
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