Interrupt Acknowledge Map; Vmebus Memory Map - Motorola MVME172 Programmer's Reference Manual

Board Description and Memory Maps
1

Interrupt Acknowledge Map

VMEbus Memory Map

1-46
20. Eight bytes are reserved for the serial number, in ASCII, assigned to
the optional third IndustryPack c.
21. Eight bytes are reserved for the printed wiring board (PWB) number
assigned to the optional third IndustryPack c.
22. Eight bytes are reserved for the board identifier, in ASCII, assigned
to the optional fourth IndustryPack d.
23. Eight bytes are reserved for the serial number, in ASCII, assigned to
the optional fourth IndustryPack d.
24. Eight bytes are reserved for the printed wiring board (PWB) number
assigned to the optional fourth IndustryPack d.
25. Growth space (65 bytes) is reserved. This pads the structure to an
even 256 bytes.
26. The final one byte of the area is reserved for a checksum (as defined
in the Debugging Package for Motorola 68K CISC CPUs User's
Manual) for security and data integrity of the configuration area of
the NVRAM. This data is stored in hexadecimal format.
The local bus distinguishes interrupt acknowledge cycles from other
cycles by placing the binary value %11 on TT1-TT0. It also specifies the
level that is being acknowledged using TM2-TM0. The interrupt handler
selects which device within that level is being acknowledged.
This section describes the mapping of local resources as viewed by
VMEbus masters. Default addresses for the slave, master, and GCSR
address decoders are provided by the ENV command.
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