Bus Clock Register - Motorola MVME172 Programmer's Reference Manual

MC2 Chip
ADR/SIZ
3
BIT
NAME
OPER
RESET
ADR/SIZ
BIT
NAME
OPER
RESET

Bus Clock Register

ADR/SIZ
BIT
NAME
OPER
RESET
3-38
Tick Timer 4 Compare Register
31
Tick Timer 4 Counter
31
The Bus Clock Register should be programmed with the hexadecimal
value of the operating clock frequency in MHz (i.e., $21 for 33 MHz). The
MC2 chip uses the value programmed in this register to control the refresh
timer so that the DRAMs are refreshed every 15.6 microseconds. After
power-up, this register is initialized to $10 (for 16 MHz).
31 30 29
BCK5
R/W R/W
0 P 0 P 0 P
$FFF42038 (32 bits)
. . .
Tick Timer 4 Compare Register
R/W
0 P
$FFF4203C (32 bits)
. . .
Tick Timer 4 Counter
R/W
X
$FFF42040 (8 bits)
28 27
BCK4 BCK3
R/W
1 P 0 P
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0
0
26 25 24
BCK2 BCK1 BCK0
0 P 0 P 0 P