Table 1-9. Ip2 Chip Overall Memory Map - Motorola MVME172 Programmer's Reference Manual

Board Description and Memory Maps
1
Address Range
Programmable
Programmable
Programmable
Programmable
$FFF58000-$FFF5807F
$FFF58080-$FFF580BF
$FFF580C0-$FFF580FF
$FFF58100-$FFF5817F
$FFF58180-$FFF581BF
$FFF581C0-$FFF581FF
$FFF58200-$FFF5827F
$FFF58280-$FFF582BF
$FFF582C0-$FFF582FF
$FFF58300-$FFF5837F
$FFF58380-$FFF583BF
$FFF583C0-$FFF583FF
$FFF58400-$FFF584FF
$FFF58500-$FFF585FF
$FFF58600-$FFF586FF
$FFF58700-$FFF587FF
$FFFBC000-$FFFBC083
1-28
The following memory map table includes all devices selected by the IP2
chip map decoder.

Table 1-9. IP2 Chip Overall Memory Map

Selected Device
IP_a/IP_ab Memory Space
IP_b Memory Space
IP_c/IP_cd Memory Space
IP_d Memory Space
IP_a I/O Space
IP_a ID Space
IP_a ID Space Repeated
IP_b I/O Space
IP_b ID Space
IP_b ID Space Repeated
IP_c I/O Space
IP_c ID Space
IP_c ID Space Repeated
IP_d I/O Space
IP_d ID Space
IP_d ID Space Repeated
IP_ab I/O Space
IP_cd I/O Space
IP_ab I/O Space Repeated
IP_cd I/O Space Repeated
Control/Status Registers
A summary of the IP2 chip CSR registers is shown in
registers can be accessed as bytes, words, or longwords. They should not
be accessed as lines. They are shown in the table as bytes.
Port Width
D32-D8
D16-D8
D32-D8
D16-D8
D16
D16
D16
D16
D16
D16
D16
D16
D16
D16
D16
D16
D32-D16
D32-D16
D32-D16
D32-D16
D32-D8
Table
Computer Group Literature Center Web Site
Size
64KB-16MB
64KB-8MB
64KB-16MB
64KB-8MB
128B
64B
64B
128B
64B
64B
128B
64B
64B
128B
64B
64B
256B
256B
256B
256B
32B
1-10. The CSR