Detailed I/O Memory Maps - Motorola MVME172 Programmer's Reference Manual

Detailed I/O Memory Maps

Tables 1-7 through 1-17 give the detailed memory maps for:
Note
http://www.mcg.mot.com/literature
VMEchip2
MC2 chip
IP2 chip
IP2 chip Control and Status Registers
MCECC chip
Z85230 SCC Register addresses
82596CA Ethernet LAN chip
53C710 SCSI chip
MK48T58 BBRAM/TOD clock
BBRAM configuration area
TOD clock
Manufacturers' errata sheets for the various chips are
available by contacting your local Motorola sales
representative. A non-disclosure agreement may be required.
Memory Maps
Table 1-7
Table 1-8
Table 1-9
Table 1-10
Table 1-11
Table 1-12
Table 1-13
Table 1-14
Table 1-15
Table 1-16
Table 1-17
1
1-21