Mitsubishi Electric MELSEC iQ-R Series User Manual page 318

High speed data logger module
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Recipe file area (Un\G810 to 841)
The operation execution status for a recipe file and the execution result can be checked in this area.
Buffer memory name
Recipe execution information
Error code
Type of recipe execution operation
Record No.
Recipe file name
Completed recipe execution
operation count
Failed recipe execution operation
count
Access target CPU setting status area (Un\G1500 to 1593)
The setting status of the access target CPU setting can be checked in this area.
Buffer memory name
Access target CPU setting
information
Access target CPU error information
Error code of access target CPU 1 to
64
■Access target CPU setting information (Un\G1500 to 1503)
The status of an access target CPU setting is stored.
The bit corresponding to the configured access target CPU turns ON.
0: Unset
1: Set
b15 b14 b13 b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0
Un\G1500
16
15
14
13
32
31
30
29
Un\G1501
Un\G1502
48
47
46
45
Un\G1503
64
63
62
61
■Access target CPU error information (Un\G1504 to 1507)
Access target CPU error information is stored.
The bit corresponding to the access target CPU where the access target CPU error is occurring turns ON.
0: No access target CPU error
1: Access target CPU error
b15 b14 b13 b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0
16
15
14
13
Un\G1504
Un\G1505
32
31
30
29
Un\G1506
48
47
46
45
Un\G1507
64
63
62
61
Ex.
When an error occurred in the access target CPU for access target CPU setting No. 16
'Access target unit error' (X16) turns ON.
The 15th bit of the 'access target CPU error information' (Un\G1504) turns ON.
The error code is stored in the 'error code' (Un\G1545) of access target CPU 16.
APPX
316
Appendix 3 Buffer Memory
Address
Un\G810
Un\G811
Un\G812
Un\G813
Un\G814 to 837
Un\G838 to 839
Un\G840 to 841
Address
Un\G1500 to 1503
Un\G1504 to 1507
Un\G1530 to 1593
12
11
10
9
8
7
6
5
4
28
27
26
25
24
23
22
21
20
44
43
42
41
40
39
38
37
36
60
59
58
57
56
55
54
53
52
12
11
10
9
8
7
6
5
4
28
27
26
25
24
23
22
21
20
44
43
42
41
40
39
38
37
36
60
59
58
57
56
55
54
53
52
Description
The recipe execution information is stored.
0: Recipe execution operation is not executed
1: Recipe execution operation is executed
The error code which indicates the error content of the occurred recipe execution operation
error is stored.
The type of recipe execution operation is stored.
1: Transfer the device value in the recipe file to the programmable controller CPU
100: Transfer the device value of the programmable controller CPU to the recipe file
The record No. which is the target of recipe execution operation is stored.
The recipe file name which is the target of recipe execution operation is stored.
The number of completed recipe execution operation after powering ON is stored. When
performing the execution operation to different recipe files, the total number of completed
recipe execution operation is counted.
The number of failed recipe execution operation after powering ON is stored.
Description
The bit corresponding to the configured access target CPU turns ON.
The bit corresponding to the access target CPU where the access target CPU error is
occurring turns ON.
An error code is stored in the area corresponding to the access target CPU setting where
the error is occurring.
0: Normal
Other: Error code
3
2
1
19
18
17
35
34
33
51
50
49
3
2
1
19
18
17
35
34
33
51
50
49

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