Watchdog Timer In Timer Mode; Watchdog Timer In Watchdog Mode (Wdte = 1) - Philips P89LPC920 User Manual

Philips Semiconductors
WATCHDOG TIMER
MOV WFEED1, #0A5H
MOV WFEED2, #05AH
Watchdog
Oscillator
÷32
PCLK

Watchdog Timer in Timer Mode

Figure 13-4 shows the Watchdog Timer in Timer Mode. In this mode, any changes to WDCON are written to the shadow register
after one watchdog clock cycle. A watchdog underflow will set the WDTOF bit. If IEN0.6 is set, the watchdog underflow is enabled
to cause an interrupt. WDTOF is cleared by writing a '0' to this bit in software. When an underflow occurs, the contents of WDL
is reloaded into the down counter and the watchdog timer immediately begins to count down again.
A feed is necessary to cause WDL to be loaded into the down counter before an underflow occurs. Incorrect feeds are ignored
in this mode.
2003 Dec 8
PRESCALER
control register
PRE2 PRE1 PRE0
Figure 13-3: Watchdog Timer in Watchdog Mode (WDTE = 1)
WDL (C1H)
8-Bit Down
Counter
WDRUN WDTOF
89
User's Manual - Preliminary -
P89LPC920/921/922
RESET
Watchdog reset can also be caused
by an invalid feed sequence, or by
writing to WDCON not immediately
followed by a feed sequence
SHADOW
REGISTER FOR
WDCON
WDCLK
WDCON(A7H)