Table of Contents
Advertisement
Philips Semiconductors
WATCHDOG TIMER
Table 13-2: P89LPC920/921/922 Watchdog Timeout Values.
PRE2-PRE0
WDL in decimal)
0
000
255
0
001
255
0
010
255
0
011
255
0
100
255
0
101
255
0
110
255
0
111
255
Watchdog Clock Source
The watchdog timer system has an on-chip 400KHz oscillator. The watchdog timer can be clocked from either the watchdog oscillator or
from PCLK (refer to Figure 13-1) by configuring the WDCLK bit in the Watchdog Control Register WDCON. When the watchdog feature is
enabled, the timer must be fed regularly by software in order to prevent it from resetting the CPU.
After changing WDCLK (WDCON.0), switching of the clock source will not immediately take effect. As shown in Figure 13-3, the selection
is loaded after a watchdog feed sequence. In addition, due to clock synchronization logic, it can take two old clock cycles before the old clock
source is deselected, and then an additional two new clock cycles before the new clock source is selected.
Since the prescaler starts counting immediately after a feed, switching clocks can cause some inaccuracy in the prescaler count. The
inaccuracy could be as much as 2 old clock source counts plus 2 new clock cycles.
Note: When switching clocks, it is important that the old clock source is left enabled for 2 clock cycles after the feed completes. Otherwise,
the watchdog may become disabled when the old clock source is disabled. For example, suppose PCLK (WCLK=0) is the current clock
source. After WCLK is set to '1', the program should wait at least two PCLK cycles (4 CCLKs) after the feed completes before going into
Power down mode. Otherwise, the watchdog could become disabled when CCLK turns off. The watchdog oscillator will never become
selected as the clock source unless CCLK is turned on again first.
2003 Dec 8
Timeout Period
(in watchdog clock
400KHz Watchdog Oscillator Clock
cycles)
33
8,193
65
16,385
129
32,769
257
65,537
513
131,073
1,025
262,145
2,049
524,289
4097
1,048,577
88
Watchdog Clock Source
12MHz CCLK (6MHz CCLK/2
(Nominal)
82.5µs
20.5ms
162.5µs
41.0ms
322.5µs
81.9ms
642.5µs
163.8ms
.1.28ms
327.7ms
2.56ms
655.4ms
5.12ms
1.31s
10.2ms
2.62s
User's Manual - Preliminary -
P89LPC920/921/922
Watchdog Clock)
5.50µs
1.37ms
10.8µs
2.73ms
21.5µs
5.46ms
42.8µs
10.9ms
85.5µs
21.8ms
170.8µs
43.7ms
341.5µs
87.4ms
682.8µs
174.8ms
Advertisement
Table of Contents
