Reset Vector - Philips P89LPC920 User Manual

Philips Semiconductors
RESET
RSTSRC
Address: DFH
Not bit addressable
Reset Sources: Power-on only
Reset Value: xx110000B (This is the power-on reset value. Other reset sources will set corresponding bits.)
BIT SYMBOL
RSTSRC.7-6 -
RSTSRC.5 BOF
RSTSRC.4 POF
RSTSRC.3 R_BK
RSTSRC.2 R_WD
RSTSRC.1 R_SF
RSTSRC.0 R_EX

Reset vector

Following reset, the P89LPC920//921/922 will fetch instructions from either address 0000h or the Boot address. The Boot
address is formed by using the Boot Vector as the high byte of the address and the low byte of the address =00h. The Boot
address will be used if a UART break reset occurs or the non-volatile Boot Status bit (BOOTSTAT.0) = 1, or the device has been
forced into ISP mode.Otherwise, instructions will be fetched from address 0000H.
2003 Dec 8
7 6
- - BOF
FUNCTION
Reserved for future use. Should not be set to 1 by user programs.
Brownout Detect Flag. When Brownout Detect is activated, this bit is set. It will remain set
until cleared by software by writing a '0' to the bit. (Note: On a Power-on reset, both POF
and this bit will be set while the other flag bits are cleared.)
Power-on Detect Flag. When Power-on Detect is activated, the POF flag is set to indic ate
an initial power-up condition. The POF flag will remain set until cleared by software by
writing a '0' to the bit.. (Note: On a Power-on reset, both BOF and this bit will be set while
the other flag bits are cleared.)
Break detect reset. If a break detect occurs and EBRR (AUXR1.6) is set to '1', a system
reset will occur. This bit is set to indicate that the system reset is caused by a break detect.
Cleared by software by writing a '0' to the bit or on a Power-on reset.
Watchdog Timer reset flag. Cleared by software by writing a '0' to the bit or a Power-on
reset.(NOTE: UCFG1.7 must be = 1).
Software reset Flag. Cleared by software by writing a '0' to the bit or a Power-on reset.
External reset Flag. When this bit is '1', it indicates external pin reset. Cleared by software
by writing a '0' to the bit or a Power-on reset. If RST is still asserted after the Power-on
reset is over, R_EX will be set.
Figure 6-2: Reset Sources register
5 4 3
POF R_BK
40
User's Manual - Preliminary -
P89LPC920/921/922
2 1 0
R_WD R_SF R_EX