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Philips Semiconductors
I/O PORTS
Input-only configuration
The input port configuration is shown in Figure 4-3. It is a Schmitt-triggered input that also has a glitch suppression circuit.
(Please refer to the P89LPC920/921/922 datasheet, AC Electrical Characteristics for glitch filter specifications)
input data
Push-pull output configuration
The push-pull output configuration has the same pulldown structure as both the open drain and the quasi-bidirectional output
modes, but provides a continuous strong pull-up when the port latch contains a logic 1. The push-pull mode may be used when
more source current is needed from a port output.
The push-pull port configuration is shown in Figure 4-4.
A push-pull port pin has a Schmitt-triggered input that also has a glitch suppression circuit.
(Please refer to the P89LPC920/921/922 datasheet, AC Electrical Characteristics for glitch filter specifications)
Port 0 analog functions
The P89LPC920/921/922 incorporates two Analog Comparators. In order to give the best analog performance and minimize
power consumption, pins that are being used for analog functions must have both the digital outputs and digital inputs disabled.
Digital outputs are disabled by putting the port pins into the input-only mode as described in the Port Configurations section (see
Table 4-3).
Digital inputs on Port 0 may be disabled through the use of the PT0AD register. Bits 1 through 5 in this register correspond to
pins P0.1 through P0.5 of Port 0, respectively. Setting the corresponding bit in PT0AD disables that pin's digital input. Port bits
that have their digital inputs disabled will be read as 0 by any instruction that accesses the port.
On any reset, PT0AD bits 1 through 5 default to '0's to enable the digital functions.
2003 Dec 8
Figure 4-3: Input -only
port latch data
input data
Figure 4-4: Push-pull output
glitch rejection
V
DD
strong
port
pin
glitch rejection
31
User's Manual - Preliminary -
P89LPC920/921/922
port
pin
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