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Philips Semiconductors
I/O PORTS
Table 4-3: Port output configuration
Configuration SFR bits
Port pin
PxM1.y
PxM2.y
P0.0
P0M1.0
P0M2.0
P0.1
P0M1.1
P0M2.1
P0.2
P0M1.2
P0M2.2
P0.3
P0M1.3
P0M2.3
P0.4
P0M1.4
P0M2.4
P0.5
P0M1.5
P0M2.5
P0.6
P0M1.6
P0M2.6
P0.7
P0M1.7
P0M2.7
P1.0
P1M1.0
P1M2.0
P1.1
P1M1.1
P1M2.1
P1.2
P1M1.2
P1M2.2
P1.3
P1M1.3
P1M2.3
P1.4
P1M1.4
P1M2.4
P1.5
not configurable
P1.6
P1M1.6
P1M2.6
P1.7
P1M1.7
P1M2.7
P3.0
P3M1.0
P3M2.0
P3.1
P3M1.1
P3M2.1
Additional port features
After power-up, all pins are in Input-Only mode. Please note that this is different from the LPC76x series of devices.
• After power-up, all I/O pins except P1.5, may be configured by software.
• Pin P1.5 is input only. Pins P1.2 and P1.3 are configurable for either input-only or open drain.
Every output on the P89LPC920/921/922 has been designed to sink typical LED drive current. However, there is a maximum
total output current for all ports which must not be exceeded. Please refer to the P89LPC920/921/922 Datasheet for detailed
specifications.
All ports pins that can function as an output have slew rate controlled outputs to limit noise generated by quickly switching output
signals. The slew rate is factory-set to approximately 10 ns rise and fall times.
2003 Dec 8
Alternate usage
KBI0,CMP2
KBI1,CIN2B
KBI2,CIN2A
Refer to section "Port 0 analog functions" for usage as
KBI3,CIN1B
analog inputs (CIN2B, CIN2A, CIN1B, CIN1A and
KBI4,CIN1A
KBI5,CMPREF
KBI6,CMP1
KBI7,T1
TxD
RxD
T0,SCL
INT0,SDA
INT1
Input only. Usage as general purpose input or RST is
RST
determined by User Configuration Bit RPD (UCFG1.6).
Always a reset input during a power-on sequence.
XTAL2,CLKOUT
XTAL1
Notes
CMPREF)
input-only or open-drain
input-only or open-drain
32
User's Manual - Preliminary -
P89LPC920/921/922
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