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Philips Semiconductors
2
I
C INTERFACE
Slave Receiver Mode
In the Slave Receiver Mode, data bytes are received from a master transmitter. To initialize the Slave Receiver Mode, the user
should write the slave address to the Slave Address Register (I2ADR) and the I
as follows:
I2CON (D8h)
CRSEL is not used for slave mode. I2EN must be set = 1 to enable I
slave address or the general call address. STA, STO and SI are cleared to 0.
After I2ADR and I2CON are initialized, the interface waits until it is addressed by its own address or general address followed by
the data direction bit which is 0(W). If the direction bit is 1(R), it will enter Slave Transmitter Mode. After the address and the
direction bit have been received, the SI bit is set and a valid status code can be read from the Status Register(I2STAT). Refer to
Table 4 for the status codes and actions.
S
Slave Address
From Master to Slave
From Slave to Master
Slave Transmitter Mode
The first byte is received and handled as in the Slave Receiver Mode. However, in this mode, the direction bit will indicate that
the transfer direction is reversed. Serial data is transmitted via P1.3/SDA while the serial clock is input through P1.2/SCL. START
and STOP conditions are recognized as the beginning and end of a serial transfer. In a given application, I
master and as a slave. In the slave mode, the I
of these addresses is detected, an interrupt is requested. When the microcontrollers wishes to become the bus master, the
hardware waits until the bus is free before the master mode is entered so that a possible slave action is not interrupted. If bus
arbitration is lost in the master mode, I
same serial transfer.
2003 Dec 8
7
6
5
-
I2EN
STA
-
1
0
2
Figure 10-10: I
C Control register
W
A
DATA
"0" - Write
"1" - Read
Figure 11: Format of Slave Receiver Mode
2
C hardware looks for its own slave address and the general call address. If one
2
C switches to the slave mode immediately and can detect its own slave address in the
69
2
C Control Register (I2CON) should be configured
4
3
2
STO
SI
AA
0
0
1
2
C function. AA bit must be set = 1 to acknowledge its own
A
DATA
Data Transferred
(n Bytes + Acknowledge
A = Acknowledge (SDA low)
A = Not Acknowledge (SDA high)
S = START condition
P = STOP Condition
RS = Repeated START condition
User's Manual - Preliminary -
P89LPC920/921/922
1
0
-
CRSEL
-
-
A /A
P/RS
2
C may operate as a
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