Open Drain Output Configuration; Quasi-Bidirectional Output; Open Drain Output - Philips P89LPC920 User Manual

Philips Semiconductors
I/O PORTS
The third pull-up is referred to as the "strong" pull-up. This pull-up is used to speed up low-to-high transitions on a quasi-
bidirectional port pin when the port latch changes from a logic 0 to a logic 1. When this occurs, the strong pull-up turns on for two
CPU clocks quickly pulling the port pin high .
The quasi-bidirectional port configuration is shown in Figure 4-1.
Although the P89LPC920/921/922 is a 3 V device most of the pins are 5 V-tolerant. If 5 V is applied to a pin configured in quasi-
bidirectional mode, there will be a current flowing from the pin to V
to pins configured in quasi-bidirectional mode is discouraged.
A quasi-bidirectional port pin has a Schmitt-triggered input that also has a glitch suppression circuit.
(Please refer to the P89LPC920/921/922 datasheet, AC Electrical Characteristics for glitch filter specifications)
port latch data

Open drain output configuration

The open drain output configuration turns off all pull-ups and only drives the pulldown transistor of the port pin when the port latch
contains a logic 0. To be used as a logic output, a port configured in this manner must have an external pull-up, typically a resistor
tied to V . The pulldown for this mode is the same as for the quasi-bidirectional mode.
DD
The open drain port configuration is shown in Figure 4-2.
An open drain port pin has a Schmitt-triggered input that also has a glitch suppression circuit.
Please refer to the P89LPC920/921/922 datasheet, AC Electrical Characteristics for glitch filter specifications).
port latch data
2003 Dec 8
2 CPU
clock delay
input data
Figure 4-1: Quasi-bidirectional output
input data
Figure 4-2: Open drain output
causing extra power consumption. Therefore, applying 5 V
DD
V
V
DD
strong
glitch rejection
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User's Manual - Preliminary -
P89LPC920/921/922
V
DD DD
very
weak
weak
port
pin
glitch rejection
port
pin