Boot Rom; Power-On Reset Code Execution; Hardware Activation Of The Boot Loader - Philips P89LPC920 User Manual

Philips Semiconductors
FLASH MEMORY

Boot ROM

When the microcontroller contains a a 256 byte Boot ROM that is separate from the user's Flash program memory. This Boot
ROM contains routines which handle all of the low level details needed to erase and program the user Flash memory . A user
program simply calls a common entry point in the Boot ROM with appropriate parameters to accomplish the desired operation.
Boot ROM operations include operations such as erase sector, erase page, program page, CRC, program security bit, etc. The
Boot ROM occupies the program memory space at the top of the address space from FF00 to FFFF hex, thereby not conflicting
with the user program memory space.This function is in addition to the IAP-Lite feature.

Power-On reset code execution

The P89LPC920/921/922 contains two special Flash elements: the BOOT VECTOR and the Boot Status Bit. Following reset,
the P89LPC920/921/922 examines the contents of the Boot Status Bit. If the Boot Status Bit is set to zero, power-up execution
starts at location 0000H, which is the normal start address of the user's application code. When the Boot Status Bit is set to a va
one, the contents of the Boot Vector is used as the high byte of the execution address and the low byte is set to 00H.
The factory default settings for these devcies are show in Table 15-1, below.The factory pre-programmed boot loader can be
erased by the user. Users who wish to use this loader should take cautions to avoid erasing the last 1KB sector on the
device. Instead, the page erase function can be used to erase the eight 64-byte pages located in this sector. A custom
boot loader can be written with the Boot Vector set to the custom boot loader, if desired.
Table 15-1: Boot Loader Address and Default Boot Vector
FLASH
PRODUCT
SIZE
ADDRESS
P89LPC922 8K x 8
P89LPC921 4K x 8
P89LPC920 2K x 8

Hardware activation of the Boot Loader

The boot loader can also be executed by forcing the device into ISP mode during a power-on sequence (see Figure 15-4).This
is accomplished by powering up the device with the reset pin initially held low and holding the pin low for a fixed time after VDD
rises to its normal operating value. This is followed by three, and only three, properly timed low-going pulses. Fewer or more
than three pulses will result in the device not entering ISP mode. Timing specifications may be found in the datasheet for this
device.
This has the same effect as having a non-zero status bit. This allows an application to be built that will normally execute the user
code but can be manually forced into ISP operation. If the factory default setting for the Boot Vector is changed, it will no longer
point to the factory pre-programmed ISP boot loader code. If this happens, the only way it is possible to change the contents of
the Boot Vector is through the parallel or ICP programming method, provided that the end user application does not contain a
customized loader that provides for erasing and reprogramming of the Boot Vector and Boot Status Bit. After programming the
Flash, the status byte should be programmed to zero in order to allow execution of the user's application code beginning at
address 0000H.
2003 Dec 8
END SIGNATURE BYTES
MFG ID1
1FFF 15H DDH 0CH
or 15H DDH 05H
0FFF 15H DDH 0BH
or 15H DDH 05H
07FF 15H DDH 1AH
SECTOR PAGE
SIZE SIZE
ID2
1Kx8 64x8
1Kx8 64x8
1Kx8 64x8
98
User's Manual - Preliminary -
P89LPC920/921/922
PRE-PROGRAMMED
SERIAL LOADER
1E00H-1FFFH
0E00H-0FFFH
0600H-07FFH
DEFAULT
BOOT
VECTOR
1FH
0FH
07H