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Philips Semiconductors
2
I
C INTERFACE
S
Slave Address
From Master to Slave
From Slave to Master
Master Receiver Mode
In the Master Receiver Mode, data is received from a slave transmitter. The transfer started in the same manner as in the Master
Transmitter Mode. When the START condition has been transmitted, the interrupt service routine must load the slave address
and the data direction bit to I
When the slave address and data direction bit have been transmitted and an acknowledge bit has been received, the SI bit is
set, and the Status Register will show the status code. For master mode, the possible status codes are 40H, 48H, or 38H. For
slave mode, the possible status codes are 68H, 78H, or B0H. Refer to Table 3 for details.
S
Slave Address
From Master to Slave
From Slave to Master
After a repeated START condition, I
S
SLA
R
From Master to Slave
From Slave to Master
Figure 9: A Master Receiver switches to Master Transmitter after sending Repeated Start
2003 Dec 8
R/W
"0" - Write
"1" - Read
Figure 7: Format in the Master Transmitter Mode
2
C Data Register (I2DAT). The SI bit must be cleared before the data transfer can continue.
R
A
"0" - Write
"1" - Read
Figure 8: Format of Master Receiver Mode
2
C may switch to the Master Transmitter Mode.
A
DATA
A
DATA
Data Transferred
(n Bytes +
Acknowledge
A
DATA
A
Data Transferred
(n Bytes + Acknowledge
A = Acknowledge (SDA low)
A = Not Acknowledge (SDA high)
S = START condition
P = STOP Condition
DATA
A
Data Transferred
(n Bytes + Acknowledge
A = Acknowledge (SDA low)
A = Not Acknowledge (SDA high)
S = START condition
A
RS
SLA
A = Acknowledge (SDA low)
A = Not Acknowledge (SDA high)
S = START condition
P = STOP Condition
SLA = Slave Address
RS = Repeat START condition
68
User's Manual - Preliminary -
P89LPC920/921/922
DATA
A/A
DATA
A
P
W
A
DATA
P
A
P
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