More About Uart Modes 2 And 3; Framing Error And Ri In Modes 2 And 3 With Sm2 = 1; Break Detect; Serial Port Mode 2 Or 3 (Only Single Transmit Buffering Case Is Shown) - Philips P89LPC920 User Manual

80c51 8-bit microcontroller with two-clock core
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UART

More about UART Modes 2 and 3

Reception is the same as in Mode 1.
The signal to load SBUF and RB8, and to set RI, will be generated if, and only if, the following conditions are met at the time the
final shift pulse is generated. (a) RI = 0, and (b) Either SM2 = 0, or the received 9th data bit = 1. If either of these conditions is
not met, the received frame is lost, and RI is not set. If both conditions are met, the received 9th data bit goes into RB8, and the
first 8 data bits go into SBUF.
TX Clock
Write to SBUF
Shift
TxD
TI
RX Clock
RxD
÷ 16 Reset
Shift
RI
Figure 9-7: Serial Port Mode 2 or 3 (only single transmit buffering case is shown)

Framing Error and RI in Modes 2 and 3 with SM2 = 1

If SM2 = 1 in modes 2 and 3, RI and FE behaves as in the following table.
Table 9-3: FE and RI when SM2 = 1 in Modes 2 and 3
PCON.6
Mode
(SMOD0)
2
0
3
1

Break Detect

. A break is detected when 11 consecutive bits are sensed low and is reported in the status register (SSTAT). For Mode 1, this
consists of the start bit, 8 data bits, and two stop bit times. For Modes 2 & 3, this consists of the start bit, 9 data bits, and one stop
2003 Dec 8
Start Bit
D0
D1
D2
Start Bit
D0
D1
D2
RB8
0
No RI when RB8 = 0
Similar to Figure 9-7, with SMOD0 = 0, RI
1
occurs during RB8, one bit before FE
0
No RI when RB8 = 0
Similar to Figure 9-7, with SMOD0 = 1, RI
1
occurs during STOP bit
D3
D4
D5
D6
D3
D4
D5
D6
RI
57
User's Manual - Preliminary -
P89LPC920/921/922
D7
TB8
Stop Bit
INTLO = 0
INTLO = 1
D7
RB8
Stop Bit
SMOD0 = 0
SMOD0 = 1
FE
Occurs during STOP bit
Occurs during STOP bit
Will NOT occur
Occurs during STOP bit
Transmit
Receive

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