Cpg Register Description; Frequency Control Register (Frqcr); Table 10.4 Frqcr Settings And Internal Clock Frequencies - Hitachi SH7750 Hardware Manual

Sh7750 series superh risc engine

Hide thumbs Also See for SH7750:

Table of Contents

(Lower 9 Bits)

Note: For the lower 9 bits of FRQCR, do not set values other than those shown in the table.

CPG Register Description

The frequency control register (FRQCR) is a 16-bit readable/writable register that specifies

use/non-use of clock output from the CKIO pin, PLL circuit 1 and 2 on/off control, and the CPU

clock, bus clock, and peripheral module clock frequency division ratios. Only word access can be

used on FRQCR.

FRQCR is initialized only by a power-on reset via the RESET pin. The initial value of each bit is

determined by the clock operating mode.

Rev. 6.0, 07/02, page 254 of 986

Frequency Division Ratio

Peripheral Module Clock

Table of Contents

Sh7750r Sh7750s