Timer Start Register 2 (Tstr2) (Sh7750R Only) - Hitachi SH7750 Hardware Manual

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Timer Start Register 2 (TSTR2) (SH7750R Only)

TSTR2 is an 8-bit readable/writable register that specifies whether the channels 3–4 timer counters

(TSTR2) run or are stopped.

TSTR2 is initialized to H'00 by a power-on reset and retains its value in standby mode. If standby

mode is entered when the STR3 or STR4 bit is set to 1, counting is halted at the same time as the

peripheral module clock is stopped. Counting is restarted on resumption of the clock-signal

Initial value:

Bits 7 to 2—Reserved: These bits are always read as 0. Writing to these bits is invalid. If a value

is written to these bits, it should always be 0.

Bit 1—Counter Start 4 (STR4): Specifies whether timer counter 4 (TCNT4) runs or is stopped.

Bit 0—Counter Start 3 (STR3): Specifies whether timer counter 3 (TCNT3) runs or is stopped.

Counting by TCNT4 is stopped

Counting by TCNT4 proceeds

Counting by TCNT3 is stopped

Counting by TCNT3 proceeds

(Initial value)

Rev. 6.0, 07/02, page 297 of 986

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