Wait Control Register 3 (Wcr3) - Hitachi SH7750 Hardware Manual

13.2.7

Wait Control Register 3 (WCR3)

Wait control register 3 (WCR3) is a 32-bit readable/writable register that specifies the cycles
inserted in the setup time from the address until assertion of the write strobe, and the data hold
time from negation of the strobe, for each area. This enables low-speed memory to be connected
without using external circuitry.
WCR3 is initialized to H'07777777 by a power-on reset, but is not initialized by a manual reset or
in standby mode.
Bit:
Bit name:
Initial value:
R/W:
Bit:
Bit name:
Initial value:
R/W:
Bit:
Bit name:
Initial value:
R/W:
Bit:
Bit name: A1RDH*
Initial value:
R/W:
Note: * SH7750R only
Bits 31 to 27, 23, 19*, 15, 11, 7*, and 3—Reserved: These bits are always read as 0, and should
only be written with 0.
Note: * SH7750R only
31 30
— —
0 0
R R
23 22
— A5S0 A5H1
0 1
R R/W R/W
15 14
— A3S0 A3H1
0 1
R R/W R/W
7 6
A1S0 A1H1
0 1
R/W* R/W R/W
29 28 27
— — —
0 0 0
R R R
21 20 19
A5H0 A4RDH*
1 1 0
R/W R/W*
13 12 11
A3H0 —
1 1 0
R/W R
5 4 3
A0H0 —
1 1 0
R/W R
26 25
A6S0 A6H1
1 1
R/W R/W
18 17
A4S0 A4H1
1 1
R/W R/W
10 9
A2S0 A2H1
1 1
R/W R/W
2 1
A0S0 A0H1
1 1
R/W R/W
Rev. 6.0, 07/02, page 351 of 986
24
A6H0
1
R/W
16
A4H0
1
R/W
8
A2H0
1
R/W
0
A0H0
1
R/W