1.4.3
Pin Functions (264-Pin CSP)
Table 1.4
Pin Functions
Pin
No.
No.
Pin Name
RDY
1
C2
RESET
2
B1
CS0
3
D3
CS1
4
E2
CS4
5
B2
CS5
6
E3
CS6
7
E4
BS
8
E1
RD2
9
F4
10
F3
VDDQ
11
D4
VSSQ
12
F2
D47
13
F5
D32
14
F1
VDD
15
G4
VSS
16
G3
D46
17
F6
D33
18
G2
VDDQ
19
G5
VSSQ
20
G1
D45
21
G6
D34
22
H3
D44
23
H4
D35
24
H1
VDDQ
25
H5
VSSQ
26
H2
D43
27
H6
D36
28
J3
D42
29
J5
D37
30
J1
VDDQ
I/O
Function
I
Bus ready
I
Reset
O
Chip select 0
O
Chip select 1
O
Chip select 4
O
Chip select 5
O
Chip select 6
O
Bus start
RD/CASS/
O
FRAME
Power IO VDD (3.3 V)
Power IO GND (0 V)
I/O
Data/port
I/O
Data/port
Power Internal VDD
(1.5 V)
Power Internal GND
(0 V)
I/O
Data/port
I/O
Data/port
Power IO VDD (3.3 V)
Power IO GND (0 V)
I/O
Data/port
I/O
Data/port
I/O
Data/port
I/O
Data/port
Power IO VDD (3.3 V)
Power IO GND (0 V)
I/O
Data/port
I/O
Data/port
I/O
Data/port
I/O
Data/port
Power IO VDD (3.3 V)
Reset
SRAM
DRAM
RDY
CS0
CS1
CS4
CS5
CS6
(BS)
(BS)
OE
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
Memory Interface
SDRAM PCMCIA MPX
RDY
RESET
CE1A
CE1B
(BS)
(BS)
CAS
OE
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
Rev. 6.0, 07/02, page 31 of 986
RDY
CS0
CS1
CS4
CS5
CS6
(BS)
FRAME
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)