Hitachi SH7750 Hardware Manual page 330

Sh7750 series superh risc engine
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Bit 7—Carry Flag (CF): This flag is set to 1 on generation of a second counter carry, or a 64 Hz
counter carry when the 64 Hz counter is read. The count register value read at this time is not
guaranteed, and so the count register must be read again.
Bit 7: CF
0
1
Bit 4—Carry Interrupt Enable Flag (CIE): Enables or disables interrupt generation when the
carry flag (CF) is set to 1.
Bit 4: CIE
0
1
Bit 3—Alarm Interrupt Enable Flag (AIE): Enables or disables interrupt generation when the
alarm flag (AF) is set to 1.
Bit 3: AIE
0
1
Rev. 6.0, 07/02, page 280 of 986
Description
No second counter carry, or 64 Hz counter carry when 64 Hz counter is read
[Clearing condition]
When 0 is written to CF
Second counter carry, or 64 Hz counter carry when 64 Hz counter is read
[Setting conditions]
Generation of a second counter carry, or a 64 Hz counter carry when the
64 Hz counter is read
When 1 is written to CF
Description
Carry interrupt is not generated when CF flag is set to 1
Carry interrupt is generated when CF flag is set to 1
Description
Alarm interrupt is not generated when AF flag is set to 1
Alarm interrupt is generated when AF flag is set to 1
(Initial value)
(Initial value)

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