Input/Output Pins; Register Configuration - Hitachi F-ZTAT H8/3039 Series Hardware Manual

6.1.3 Input/Output Pins

Table 6-1 summarizes the bus controller's input/output pins.
Table 6-1 Bus Controller Pins
Name
Address strobe
Read
Write
Wait

6.1.4 Register Configuration

Table 6-2 summarizes the bus controller's registers.
Table 6-2 Bus Controller Registers
Address* Name
H'FFED Access state control register
H'FFEE Wait control register
H'FFEF Wait state controller enable register
H'FFF3 Address control register
Note: * Lower 16 bits of the address.
Abbreviation I/O
AS
Output
RD
Output
WR
Output
WAIT
Input
Function
Strobe signal indicating valid address output on
the address bus
Strobe signal indicating reading from the
external address space
Strobe signal indicating writing to the external
address space, with valid data on the data
bus(D7 to D0)
Wait request signal for access to external three-
state-access areas
Abbreviation
ASTCR
WCR
WCER
ADRCR
R/W Initial Value
R/W H'FF
R/W H'F3
R/W H'FF
R/W H'FE
111