A/D Control/Status Register (Adcsr) - Hitachi F-ZTAT H8/3039 Series Hardware Manual

13.2.2 A/D Control/Status Register (ADCSR)

Bit
ADF
Initial value
Read/Write R/(W)
A/D end flag
Indicates end of A/D conversion
Note: * Only 0 can be written to clear the flag.
ADCSR is an 8-bit readable/writable register that selects the mode and controls the A/D converter.
ADCSR is initialized to H'00 by a reset and in standby mode.
416
7 6
ADIE ADST
0 0
* R/W R/W
A/D start
Starts or stops A/D conversion
A/D interrupt enable
Enables and disables A/D end interrupts
5 4 3
SCAN CKS
0 0 0
R/W R/W
Clock select
Selects the A/D conversion time
Scan mode
Selects single mode or scan mode
2 1
CH2 CH1 CH0
0 0
R/W R/W
Channel select 2 to 0
These bits select analog
input channels
0
0
R/W