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(1) Data write
(2) Transfer from
TDR to TSR
(3) Serial data output
In case of normal transmission: TEND flag is set
In case of transmit error:
Note: When the ERS flag is set, it should be cleared until transfer of the last bit (D7 in LSB-first
transmission, D0 in MSB-first transmission) of the next transfer data has been completed.
Figure 12-5 Relation Between Transmit Operation and Internal Registers
TDR
(shift register)
Data 1
Data 1
Data 1
Data 1
ERS flag is set
Steps (2) and (3) above are repeated until the TEND flag is set
TSR
; Data remains in TDR
Data 1
I/O signal line output
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