Hitachi F-ZTAT H8/3039 Series Hardware Manual page 291

Table 8-11 (b) ITU Operating Modes (Channel 1)
TSNC
Synchro-
Operating Mode nization
Synchronous preset SYNC1 = 1 —
PWM mode
Output compare A
Output compare B
Input capture A
Input capture B
Counter By compare
clearing match/input
capture A
By compare
match/input
capture B
Syn- SYNC1 = 1 —
chronous
clear
Legend: Setting available (valid). — Setting does not affect this mode.
Notes: 1. The input capture function cannot be used in PWM mode. If compare match A and compare match B occur simultaneously, the compare match signal is inhibited.
2. Valid only when channels 3 and 4 are operating in complementary PWM mode or reset-synchronized PWM mode.
TMDR
Comple- Synchro-
mentary nized
MDF FDIR PWM PWM
— —
— — PWM1 = 1 —
— — PWM1 = 0 —
— — —
— — PWM1 = 0 —
— — PWM1 = 0 —
— — —
— — —
— —
Register Settings
TFCR TOCR
Reset-
Output
Buffer- Level
PWM ing XTGD Select
— — — —
— — — —
— — — —
— — — —
* 2
— — —
— — — —
— — — —
— — — —
— — — —
TOER TIOR1
Master Clear
Enable IOA IOB Select
—
*1
— —
— IOA2 = 0
Other bits
unrestricted
— IOB2 = 0
Other bits
unrestricted
— IOA2 = 1
Other bits
unrestricted
— IOB2 = 1
Other bits
unrestricted
— CCLR1 = 0
CCLR0 = 1
— CCLR1 = 1
CCLR0 = 0
— CCLR1 = 1
CCLR0 = 1
TCR1
Clock
Select