Hitachi F-ZTAT H8/3039 Series Hardware Manual page 535

Single-chip microcomputer
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Table 18-4 Bus Timing (cont)
Condition A:
V
CC
MHz, T
range specifications)
Condition B:
V
CC
MHz, T
range specifications)
Condition C:
V
CC
MHz, T
range specifications)
Item
Write data delay time
Write data setup time 1
Write data setup time 2
Write data hold time
Read data access time 1
Read data access time 2
Read data access time 3
Read data access time 4
Precharge time
Wait setup time
Wait hold time
Note: * For Condition A, the following times depend on the clock cycle time as shown below.
= 1.5 × t
t
ACC1
= 2.5 × t
t
ACC2
= 1.0 × t
t
ACC3
= 2.0 × t
t
ACC4
For Condition B, the following times depend on the clock cycle time as shown below.
= 1.5 × t
t
ACC1
= 2.5 × t
t
ACC2
= 1.0 × t
t
ACC3
= 2.0 × t
t
ACC4
For Condition C, the following times depend on the clock cycle time as shown below.
= 1.5 × t
t
ACC1
= 2.5 × t
t
ACC2
= 1.0 × t
t
ACC3
= 2.0 × t
t
ACC4
528
= 2.7 V to 5.5 V, AV
= –20°C to +75°C (regular specifications), T
a
= 3.0 V to 5.5 V, AV
= –20°C to +75°C (regular specifications), T
a
= 5.0 V ± 10%, AV
CC
= –20°C to +75°C (regular specifications), T
a
Condition A Condition B Condition C
8 MHz
Symbol
Min
t
WDD
t
60
WDS1
t
5
WDS2
t
25
WDH
t
*
ACC1
t
*
ACC2
t
*
ACC3
t
*
ACC4
t
85
*
PCH
t
40
WTS
t
10
WTH
– 68 (ns)
cyc
– 73 (ns)
cyc
– 55 (ns)
cyc
– 70 (ns)
cyc
– 50 (ns)
cyc
– 50 (ns)
cyc
– 50 (ns)
cyc
– 50 (ns)
cyc
– 34 (ns)
cyc
– 34 (ns)
cyc
– 36 (ns)
cyc
– 31 (ns)
cyc
= 2.7 V to 5.5 V, V
CC
= 3.0 V to 5.5 V, V
CC
= 5.0 V ± 10%, V
SS
10 MHz
Max
Min
Max
75
75
40
–10
20
120
100
240
200
70
50
180
150
60
40
10
= 1.0 × t
t
WSW1
= 1.5 × t
t
WSW2
= 1.0 × t
t
PCH
= 1.0 × t
t
WSW1
= 1.5 × t
t
WSW2
= 1.0 × t
t
PCH
= 1.0 × t
t
WSW1
= 1.5 × t
t
WSW2
= 1.0 × t
t
PCH
= AV
= 0 V, ø = 2 MHz to 8
SS
SS
= –40°C to +85°C (wide-
a
= AV
= 0 V, ø = 2 MHz to 10
SS
SS
= –40°C to +85°C (wide-
a
= AV
= 0 V, ø = 2 MHz to 18
SS
= –40°C to +85°C (wide-
a
18 MHz
Min
Max
Unit
55
ns
10
–10
20
50
105
20
80
40
25
5
– 40
(ns)
cyc
– 38
(ns)
cyc
– 40
(ns)
cyc
– 40
(ns)
cyc
– 40
(ns)
cyc
– 40
(ns)
cyc
– 24
(ns)
cyc
– 22
(ns)
cyc
– 21
(ns)
cyc
Test
Conditions
Figure 18-7,
Figure 18-8
Figure 18-9

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