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• In the boot mode, perform FWE pin High/Low switching during reset.
In transition to the boot mode, input FWE=High level and set MD
RES input is low. At this time, the FWE and MD
programming setup time (t
programming setup time is necessary for RES reset timing even in transition from the
boot mode to another mode.
In reset during operation, the RES pin must be held at a low level for at least 20 system
clocks.
• In the user program mode, FWE=High/Low switching is possible regardless of the RES
input.
FWE input switching is also possible during program execution on flash memory.
• Apply an input to FWE when the program is not running away.
When applying an input to the FWE pin, the program execution state must be
supervised using a watchdog timer, etc.
• Input low level to the FWE pin when the SWE, ESU, PSU, EV, PV, E, and P bits in
FLMCR have been cleared.
Do not erroneously set the SWE, ESU, PSU, EV, PV, E, and P bits when FWE
High/Low.
(4) Do not input a constant high level to the FWE pin.
To prevent erroneous programming/erasing in the event of program runaway, etc., input a high
level to the FWE pin only when programming/erasing flash memory (including flash memory
emulation by RAM). Avoid system configurations that constantly input a high level to the
FWE pin. Handle program runaway, etc. by starting the watchdog timer so that flash memory
is not overprogrammed/overerased even while a high level is input to the FWE pin.
(5) Program/erase the flash memory in accordance with the recommended algorithms.
The recommended algorithms can program/erase the flash memory without applying voltage
stress to the device or sacrificing the reliability of the program data.
When setting the PSU and ESU bits in FLMCR, set the watchdog timer for program runaway,
etc.
(6) Do not set/clear the SWE bit while a program is executing on flash memory.
Before performing flash memory program execution or data read, clear the SWE bit.
If the SWE bit is set, the flash data can be reprogrammed, but flash memory cannot be
accessed for purposes other than verify (verify during programming/erase).
Similarly perform flash memory program execution and data read after clearing the SWE bit
even when using the RAM emulation function with a high level input to the FWE pin.
However, RAM area that overlaps flash memory space can be read/programmed whether the
SWE bit is set or cleared.
(7) Do not use an interrupt during flash memory programming or erasing.
Since programming/erase operations (including emulation by RAM) have priority when a high
level is input to the FWE pin, disable all interrupt requests, including NMI.
) relative to the reset clear timing. The mode
MDS
to MD
2
to MD
inputs must satisfy the mode
2
0
while the
0
485
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