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Memory Operating Mode
Optimizer Mode
This mode supports Single Device Data Correction (SDDC) only for memory modules that use x4 device width. It does not impose any
specific slot population requirements.
•
Dual processor: Populate the slots in round robin sequence starting with processor 1.
NOTE:
Processor 1 and processor 2 population should match.
Table 8. Memory population rules
Processor
Configuration
Single processor
Optimizer (Independent channel)
population order
Mirror population order
Single rank sparing population order 1, 2, 3, 4, 5, 6, 7, 8, 9, 10
Multi rank sparing population order
Dual processor
Optimized (Independent channel)
(Populate round robin
population order
starting with
processor1)
76
Installing and removing system components
Description
NOTE:
Memory sparing does not offer protection against
a multi-bit uncorrectable error.
Memory population
1, 2, 3, 4, 5, 6, 7, 8, 9, 10
{1, 2, 3, 4, 5, 6}
1, 2, 3, 4, 5, 6, 7, 8, 9, 10
A{1}, B{1}, A{2}, B{2}, A{3},
B{3}...
Memory population information
•
Populate in this order, odd amount
allowed.
•
Odd number of DIMM population
is allowed.
NOTE:
Odd number of
DIMMs will result in
unbalanced memory
configurations, which in
turn will result in
performance loss. It is
recommended to populate
all memory channels
identically with identical
DIMMs for best
performance.
•
Optimizer population order is not
traditional for 4 and 8 DIMM
installations of single processor.
•
For 4 DIMMs: A1, A2, A4, A5
•
For 8 DIMMs: A1, A2, A4, A5,
A7, A8, A9, A10
Mirroring is supported with 6 DIMM
slots per processor.
Populate in this order, odd amount
allowed. Requires two ranks or more
per channel.
Populate in this order, odd amount
allowed. Requires three ranks or more
per channel.
•
Odd amount of DIMM slots per
processor allowed.
•
Odd number of DIMM population
is allowed.
NOTE:
Odd number of
DIMMs will result in
unbalanced memory
configurations, which in
turn will result in
performance loss. It is
recommended to populate
all memory channels
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