Download Print this page

Toshiba TLCS-900/H1 Series Manual page 58

Original cmos 32-bit microcontroller
Hide thumbs Also See for TLCS-900/H1 Series:

Advertisement

(2) External interrupt control
Symbol
Name Address
Interrupt
F6H
input
IIMC
(Prohibit
mode
RMW)
control
*INT0 level enable
0
Edge detect INT
1
"H" level INT
Note 1: Disable INT0 request before changing INT0 pin mode from level sense to edge sense.
Setting example:
DI
LD
LD
NOP
NOP
NOP
EI
X: Don't care, −: No change.
Note 2: See electrical characteristics in section 4 for external interrupt input pulse width.
Pin
Interrupt
Name
INT0
PC0
INT1
PC1
INT2
PC2
INT3
PC3
INT4
P96
INT5
P97
7
6
I5EDGE
I4EDGE
I3EDGE
W
W
0
0
INT5EDGE
INT4EDGE
INT3EDGE
0: Rising
0: Rising
0: Rising
1: Falling
1: Falling
1: Falling
(IIMC), XXXXXX00B ; Switches from level to edge.
(INTCLR), 0AH
; Clears interrupt request flag.
; Wait EI execution
Settings of External Interrupt Pin Function
Mode
<I0LE> = 0, <I0EDGE> = 0
Rising edge
<I0LE> = 0, <I0EDGE> = 1
Falling edge
<I0LE> = 1
High level
<I1EDGE> = 0
Rising edge
<I1EDGE> = 1
Falling edge
<I2EDGE> = 0
Rising edge
<I2EDGE> = 1
Falling edge
<I3EDGE> = 0
Rising edge
<I3EDGE> = 1
Falling edge
<I4EDGE> = 0
Rising edge
<I4EDGE> = 1
Falling edge
<I5EDGE> = 0
Rising edge
<I5EDGE> = 1
Falling edge
92CH21-56
5
4
3
I2EDGE
I1EDGE
W
W
W
0
0
0
INT2EDGE
INT1EDGE
0: Rising
0: Rising
1: Falling
1: Falling
Setting Method
TMP92CH21
2
1
0
I0EDGE
I0LE
W
R/W
R/W
0
0
0
INT0EDGE
0: INT0
Always
edge
write "0"
0: Rising
mode
1: Falling
1: INT0
level
mode
2009-06-19

Advertisement

loading

This manual is also suitable for:

Tmp92ch21fgJtmp92ch21