Download Print this page

Toshiba TLCS-900/H1 Series Manual page 341

Original cmos 32-bit microcontroller
Hide thumbs Also See for TLCS-900/H1 Series:

Advertisement

Start Address Register
H
(Bit23 to 16)
LSARAH
A area
(02A2H)
40H
LSARBH
B area
(02A8H)
40H
LSARCH
C area
(02AEH)
40H
Note: All registers can read-modify-write.
LCDC0L/LCDC0H/LCDC1L/LCDC1H/LCDC2L/LCDC2H/LCDR0L/LCDR0H Register
7
Bit symbol
D7
Read/Write
Reset State
Function
Address
3C0000H to
3CFFFFH
3D0000H to
3DFFFFH
3E0000H to
3EFFFFH
3F0000H to
3FFFFFH
M
L
(Bit15 to 8)
(Bit7 to 1)
LSARAM
LSARAL
(02A1H)
(02A0H)
00H
00H
LSARBM
LSARBL
(02A7H)
(02A6H)
00H
00H
LSARCM
LSARCL
(02ADH)
(02ACH)
00H
00H
6
5
4
D6
D5
D4
Depends on external LCD driver specification.
Depends on external LCD driver specification.
Depends on external LCD driver specification.
Function
Built-in RAM LCDD1
Built-in RAM LCDD2
Built-in RAM LCDD3
Built-in RAM LCDD4
92CH21-339
Row Number Setting Register
H
L
(Bit8)
(Bit7 to 0)
CMNAH
CMNAL
(02A4H)
(02A3H)
00H
00H
CMNBH
CMNBL
(02AAH)
(02A9H)
00H
00H
3
2
D3
D2
Chip Enable
Pin
LCP0
LLP
LFR
LBCD
TMP92CH21
1
0
D1
D0
2009-06-19

Advertisement

loading

This manual is also suitable for:

Tmp92ch21fgJtmp92ch21