Download Print this page

Toshiba TLCS-900/H1 Series Manual page 412

Original cmos 32-bit microcontroller
Hide thumbs Also See for TLCS-900/H1 Series:

Advertisement

TMP92CH21
3.17.5.2 Data Read Cycle
Figure 3.17.11 shows a timing chart example for a Data Read cycle from the
NAND-Flash at ND0FSPR = 02H.
Figure 3.17.11 Data Read Cycle Example (ND0FSPR = 02H)
2009-06-19
92CH21-410

Advertisement

loading

This manual is also suitable for:

Tmp92ch21fgJtmp92ch21