Toshiba TLCS-900/H1 Series Manual page 409

3.17.4.7 NAND-Flash Strobe Pulse Width Register (ND0FSPR and ND1FSPR)
Bits Mnemonic
−
7:4
3:0 SPW
Figure 3.17.8 NAND-Flash Strobe Pulse Width Register (ND0FSPR and ND1FSPR)
7
Field Name
−
Reserved
Strobe pulse Strobe pulse width (Default: 0000)
width
These bits set the Low pulse width of the
The Low pulse width is ((value set to SPW) +1 )× f
92CH21-407
6 5 4 3
Description
NDRE
TMP92CH21
2 1 0
SPW
R/W : Type
0000 : Default
and signals.
NDWE
clock
SYS
2009-06-19