Toshiba TLCS-900/H1 Series Manual page 35

(4) Runaway prevention using SFR protection register
(Purpose)
Prevention of program runaway caused by introduction of noise.
Write operations to a specified SFR are prohibited so that the program is
protected from runaway caused by stopping of the clock or by changes to the
memory control register (memory controller, MMU)
operations.
Runaway error handling is also facilitated by INTP0 interruption.
Specified SFR list
1. Memory controller
B0CSL/H, B1CSL/H, B2CSL/H, B3CSL/H, BECSL/H
MSAR0, MSAR1, MSAR2, MSAR3,
MAMR0, MAMR1, MAMR2, MAMR3, PMEMCR,
BROMCR
2. MMU
LOCALPX/PY/PZ, LOCALLX/LY/LZ,
LOCALRX/RY/RZ, LOCALWX/WY/WZ,
3. Clock gear
SYSCR0, SYSCR1, SYSCR2, EMCCR0
4. PLL
PLLCR0, PLLCR1
(Operation explanation)
Execute and release of protection (write operation to specified SFR) becomes
possible by setting up a double key to EMCCR1 and EMCCR2 registers.
(Double key)
1st KEY: writes in sequence, 5AH at EMCCR1 and A5H at EMCCR2
2nd KEY: writes in sequence, A5H at EMCCR1 and 5AH at EMCCR2
Protection state can be confirmed by reading EMCCR0<PROTECT>.
At reset, protection becomes OFF.
INTP0 interruption also occurs when a write operation to the specified SFR is
executed with protection in the ON state.
92CH21-33
TMP92CH21
which prevent fetch
2009-06-19