Toshiba TLCS-900/H1 Series Manual page 363

Relation of memory map image and output data
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Address 0
LSB
D0
0 1 2 3 4 5 6
R1 G1
Address 4
LSB
D0
32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63
B3 R4
LD bus output sequence
12 bits (TFT)
→ 12 (R2) ...
LD0 0 (R1)
→ 13 (R2) ...
LD1 1 (R1)
→ 14 (R2) ...
LD2 2 (R1)
→ 15 (R2) ...
LD3 3 (R1)
→ 16 (G2) ...
LD4 4 (G1)
→ 17 (G2) ...
LD5 5 (G1)
→ 18 (G2) ...
LD6 6 (G1)
→ 19 (G2) ...
LD7 7 (G1)
→ 20 (B2) ...
LD8 8 (B1)
→ 21 (B2) ...
LD9 9 (B1)
10 (B1) → 22 (B2) ...
LD10
11 (B1) → 23 (B2) ...
LD11
Figure 3.14.16 Relation of Memory Map Image and Output Data (6)
4096 colors (12 bpp; R: 4 bits, G: 4 bits, B: 4 bits)
Display memory image
Address 1
7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
B1 R2
Address 5
G4 B4
92CH21-361
Address 2
G2 B2
Address 6
R5 G5
TMP92CH21
Address 3
MSB
D31
R3 G3
Address 7
MSB
D31
B5 R6
2009-06-19