Toshiba TLCS-900/H1 Series Manual page 306

3.11 Analog/Digital Converter
The TMP92CH21 incorporates a 10-bit successive approximation type analog/digital
converter (AD converter) with 4-channel analog input.
Figure 3.11.1 is a block diagram of the AD converter. The 4-channel analog input pins (AN0 to
AN3) are shared with the input only port G so they can be used as an input port.
Note: When IDLE2, IDLE1 or STOP mode is selected, in order to reduce power consumption, the
system may enter a stand-by mode with some timings even though the internal comparator
is still enabled. Therefore be sure to check that AD converter operations are halted before a
HALT instruction is executed.
AD mode control registers 1 and 2
ADMOD1, 2<ADTRGE>
<ADCH2:0><VREFON>
Analog input
AN3, (PG3)
ADTRG
AN2 (PG2)
AN1 (PG1)
AN0 (PG0)
VREFH
VREFL
Internal data bus
<EOCF><ADBF><ITM0><REPEAT><SCAN><ADS>
Decoder
End
Channel select
Sample and
hold
Figure 3.11.1 Block Diagram of AD Converter
92CH21-304
AD mode control register 0
ADMOD0
Scan
Repeat
Interrupt
Busy
AD converter
control circuit
Comparator
DA converter
TMP92CH21
ADTRG
Start
INTAD
interrupt
AD conversion result
register
ADREG0L to ADREG3L
ADREG0H to ADREG3H
2009-06-19