Figure 21-6 Circuit Diagram To Improve The Eft Characteristics - Samsung S3F84B8 User Manual

8-bit cmos
Hide thumbs Also See for S3F84B8:
Table of Contents

Advertisement

S3F84B8_UM_REV 1.00
VSS
S3F84B8
Parameter
Electrostatic discharge
104
VDD
To have better EFT performance , It is recommended to
NOTE:
1. Add a 104 capacitor as close to the VDD pin as possible
2. Use 104,102 or 101 capacitor at all input pins, especially the anlog input pins
Figure 21-6
Circuit Diagram to Improve the EFT Characteristics
Table 21-12
Symbol
V
ESD
.
ESD Characteristics
Conditions
Minimum
HBM
2000
MM
200
CDM
500
21-12
21 ELECTRICAL DATA
Typical
Maximum
Unit
V
V
V

Hide quick links:

Advertisement

Table of Contents
loading

Table of Contents