Pwmcon — Pwm Control Register: Efh, Bank0 - Samsung S3F84B8 User Manual

S3F84B8_UM_REV 1.00
4.1.29 PWMCON — PWM CONTROL REGISTER: EFH, BANK0
Bit Identifier
RESET Value
Read/Write
.7–.6
.5
.4
.3
.2
.1
.0
NOTE: To use anti-mis-trigger function, you must enable the linkage of CMP0 and PWM by setting PWMCCON.0 = 1.
.7 .6
0 0
R/W R/W
PWM Input Clock Select Bits
f /64
0 0
OSC
f /8
0 1
OSC
f /2
1 0
OSC
f /1
1 1
OSC
PWM Output Polarity Select Bit
0 Non-inverting output
1 Inverting output
PWM Counter Clear Bit
0 No effect.
1 Clears the PWM counter (when write).
PWM Counter Enable Bit
0 Stops counter.
1 Starts counter (unlock operation).
Anti-Mis-Trigger Enable Bit
0 Disables anti-mis-trigger function.
1 Enables anti-mis-trigger function.
PWM Overflow Interrupt Enable Bit
0 Disables interrupt.
1 Enables interrupt.
PWM Overflow Interrupt Pending Bit
0 No interrupt is pending; clears pending bit (when write).
1 Interrupt is pending; no effect (when write).
.5 .4
0 0
R/W R/W R/W
4-29
4 CONTROL REGISTERS
.3 .2 .1
0 0 0
R/W R/W
.0
0
R/W