Bor — Bit Or - Samsung S3F84B8 User Manual

S3F84B8_UM_REV 1.00
6.3.9 BOR — BIT OR
dst,src.b
BOR
dst.b,src
BOR
dst(0)  dst(0) OR src(b)
Operation:
dst(b)  dst(b) OR src(0)
The specified bit of source (or destination) is logically ORed with bit zero (LSB) of destination (or
source). The resulting bit value is stored in a specified bit of destination. No other bits of the
destination are affected. The source remain unaffected.
C: Unaffected.
Flags:
Z: Set if the result is "0"; cleared otherwise.
S: Cleared to "0".
V: Undefined.
D: Unaffected.
H: Unaffected.
Format:
opc
opc
In the second byte of 3-byte instruction formats, the destination (or source) address is four bits, the bit
NOTE:
address 'b' is three bits, and the LSB address value is one bit.
Given R1 = 07H and register 01H = 03H:
Examples:
BOR
BOR
In the first example, destination working register R1 contains the value 07H (00000111B) and
source register 01H contains the value 03H (00000011B). The statement "BOR R1,01H.1"
logically ORs bit one of register 01H (source) with bit zero of R1 (destination). This leaves the
same value (07H) in working register R1.
In the second example, destination register 01H contains the value 03H (00000011B) and the
source working register R1 contains the value 07H (00000111B). The statement "BOR 01H.2,R1"
logically ORs bit two of register 01H (destination) with bit zero of R1 (source). This leaves the
value 07H in register 01H.
or
dst | b | 0 src
src | b | 1 dst

R1, 01H.1

01H.2, R1
Bytes
3
3
R1 = 07H, register 01H = 03H
Register 01H = 07H, R1 = 07H
6-21
6 INSTRUCTION SET
Cycles Opcode
(Hex)
6 07
6 07
Addr Mode
dst src
r0 Rb
Rb r0