Timer A Control Register (Tacon) - Samsung S3F84B8 User Manual

S3F84B8_UM_REV 1.00

11.1.2 TIMER A CONTROL REGISTER (TACON)

You can use the Timer A control register (TACON) for the following purposes:

Select the Timer A operating mode (interval timer, capture mode, and PWM mode)

Clear the Timer A counter (TACNT)

Enable the Timer A overflow interrupt or Timer A match/capture interrupt

Timer A start/stop

Clear the Timer A match/capture interrupt pending conditions
You can use Timer A prescaler register (TAPS) for the following purposes:

Select the clock source (Internal or external clock source)

Program clock prescaler
TACON is located at address E1H, Set1 Bank1, and is read/write addressable using Register addressing mode.
A reset clears TACON to '00H'. This sets the Timer A to normal interval timer mode, and disables all Timer A
Interrupts. You can clear the Timer A counter at any time during normal operation by writing a "1" to TACON.5.
You can start the Timer A counter by writing a "1" to TACON.2.
The Timer A overflow interrupt (TAOVF) has the vector address D0H. When a Timer A overflow interrupt occurs, it
is serviced by the CPU. The pending condition can be cleared by both software and hardware.
To enable Timer A match/capture interrupt, you must write TACON.3 to "1". To generate the exact time interval,
you should write TACON.5 and TACON.1, which clears the counter and interrupt pending bit. When interrupt
service routine is served, the pending condition must be cleared by the software by writing a '0' to the interrupt
pending bit.
11-3
11 8-BIT TIMER A