Pulse Width Modulation Mode (Timer D) - Samsung S3F84B8 User Manual

S3F84B8_UM_REV 1.00

12.2.3.2 Pulse Width Modulation Mode (Timer D)

Pulse width modulation (PWM) mode allows you to program the width (duration) of pulse that is outputted at the
TDOUT (P2.0) pin. As in interval timer mode, a match signal is generated when the counter value is identical to
the value written to Timer D data register. In PWM mode, however, the match signal does not clear the counter.
Instead, it runs continuously, overflowing at "FFH" in case of 8-bit PWM mode, and then continues to increment
from "00H".
Even though you can use the match signal to generate a Timer D overflow interrupt, interrupts are not typically
used in PWM-type applications. Instead, the pulse at TDOUT pin is held to Low level as long as the reference
data value is less than or equal to () the counter value. The pulse is then held to High level as long as the data
value is greater than (>) the counter value. One pulse width is equal to t
selected (see
Figure 12-6).
TDPS.3-.0
fx
Prescaler
NOTE: In PWM mode, match signalwill not clear counter.
6-Bit OVF
7-Bit OVF
8-Bit OVF
Up-Counter
R
(Read-Only)
6-Bit Match
7-Bit Match
8-Bit Match
Match
8-Bit Comparator
Timer D Buffer
Register
Timer D Data Register
(Read/Write)
Data Bus
Figure 12-9 Timer D PWM Function Block Diagram
 256 in case 8-bit PWM mode is
CLK
MUX
Clear
TDCON.5
MUX
MUX
TDCON.6-.7
Selected TDOVF
TDCON.5
12-11
TDCON.6-.7
TDCON.0
TDCON.2
TDCON.6-.7
TDOUT(PWM, Interval)
TDCON.1
Pending Bit
(Match INT)
TDCON.3
12 TIMER 0
TDOVF
P2.0
TDINT