System Mode Register (Sym) - Samsung S3F84B8 User Manual

S3F84B8_UM_REV 1.00

5.1.9 SYSTEM MODE REGISTER (SYM)

The system mode register, SYM (DEH, Set1), is used to enable and disable interrupt processing globally and to
control fast interrupt processing (see
A reset clears SYM.1 and SYM.0 to "0". The 3-bit value for fast interrupt level selection, SYM.4–SYM.2, is
undetermined.
The instructions EI and DI enable and disable global interrupt processing by modifying the bit 0 value of the SYM
register. In order to enable interrupt processing, an Enable Interrupt (EI) instruction must be included in the
initialization routine, which follows a reset operation. Although you can manipulate SYM.0 directly to enable and
disable interrupts during the normal operation, it is recommended to use the EI and DI instructions for this
purpose.
MSB
Always logic "0".
Figure 5-5).
System Mode Register (SYM)
DEH, Set1, R/W
.7 .6 .5 .4
Fast interrupt level
selection bits:
Not used for the
0 0 0
S3F84B8
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1
Figure 5-5
.3 .2 .1 .0
Global interrupt enable bit:
0 = Disable all interrupts processing
1 = Enable all interrupts processing
Fast interrupt enable bit:
IRQ0
0 = Disable fast interrupts processing
IRQ1
1 = Enable fast interrupts processing
IRQ2
IRQ3
IRQ4
IRQ5
IRQ6
IRQ7
System Mode Register (SYM)
5-8
5 INTERRUPT STRUCTURE
LSB