S3F84B8_UM_REV 1.00
4.1.21 OPACON — OP AMP CONTROL REGISTER: E0H, BANK1
Bit Identifier
RESET Value
Read/Write
.7–.2
.1
.0
.7
.6
–
–
–
–
Not used for S3F84B8.
OP AMP Mode Select Bit
0
Off chip mode (External positive input)
1
On chip mode (Internal ground level positive input)
OP AMP Enable Bit
0
Disables OP AMP.
1
Enables OP AMP.
.5
.4
.3
–
–
–
–
–
–
4-21
4 CONTROL REGISTERS
.2
.1
.0
–
0
0
–
R/W
R/W