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S3F84B8_UM_REV 1.00
6.2 FLAGS REGISTER (FLAGS)
The flags register (FLAGS) contains eight bits that describe current status of the CPU operations. Four of these
bits, FLAGS.7 to FLAGS.4, can be tested and used with conditional jump instructions; two other bits, FLAGS.3
and FLAGS.2, are used for BCD arithmetic.
The flags register (FLAGS) also contains a bit to indicate the status of fast interrupt processing (FLAGS.1) and a
bank address status bit (FLAGS.0) to indicate whether bank 0 or bank 1 is currently being addressed. It can be set
or reset by instructions as long as its outcome does not affect flags such as Load instruction.
Logical and Arithmetic instructions such as AND, OR, XOR, ADD, and SUB can affect the FLAGS register. For
example, the AND instruction updates the Zero, Sign, and Overflow flags based on the outcome of the AND
instruction. If the AND instruction uses the FLAGS register as the destination, then two write will occur
simultaneously to the Flags register, producing an unpredictable result.
Carry flag (C)
System Flags Register (FLAGS)
MSB
.7
.6
.5
Zero flag (Z)
Sign flag (S)
Overflow flag (V)
Figure 6-1
D5H, R/W
.4
.3
.2
.1
Half-carry flag (H)
Decimal adjust flag (D)
System Flags Register (FLAGS)
6-5
6 INSTRUCTION SET
.0
LSB
Bank address
status flag (BA)
Fast interrupt
status flag (FIS)
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