Bxor — Bit Xor - Samsung S3F84B8 User Manual

S3F84B8_UM_REV 1.00
6.3.12 BXOR — BIT XOR
dst,src.b
BXOR
dst.b,src
BXOR
dst(0)  dst(0) XOR src(b)
Operation:
dst(b)  dst(b) XOR src(0)
The specified bit of source (or destination) is logically exclusive-ORed with bit zero (LSB) of
destination (or source). The result bit is stored in the specified bit of destination. No other bits of
the destination are affected. The source remains unaffected.
C: Unaffected.
Flags:
Z: Set if the result is "0"; cleared otherwise.
S: Cleared to "0".
V: Undefined.
D: Unaffected.
H: Unaffected.
Format:
opc
opc
In the second byte of 3-byte instruction formats, the destination (or source) address is four bits, the bit
NOTE:
address 'b' is three bits, and the LSB address value is one bit in length.
Given R1 = 07H (00000111B) and register 01H = 03H (00000011B):
Examples:
BXOR R1,01H.1
BXOR 01H.2,R1
In the first example, destination working register R1 has the value 07H (00000111B) and source
register 01H has the value 03H (00000011B). The statement "BXOR R1,01H.1" exclusive-ORs
bit one of register 01H (source) with bit zero of R1 (destination). The result bit value is stored in bit
zero of R1, changing its value from 07H to 06H. The value of source register 01H remains
unaffected.
or
dst | b | 0 src
src | b | 1 dst


Bytes
3
3
R1 = 06H, register 01H = 03H
Register 01H = 07H, R1 = 07H
6-24
6 INSTRUCTION SET
Cycles Opcode
(Hex)
6 27
6 27
Addr Mode
dst src
r0 Rb
Rb r0