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S3F84B8_UM_REV 1.00
4
CONTROL REGISTERS
4.1 OVERVIEW OF CONTROL REGISTERS
This section provides a detailed description of the S3F84B8 control registers in an easy-to-read format to
familiarize you with the mapped locations in register file. You can also use them as a quick-reference source when
writing application programs.
summarizes the system and peripheral registers. In addition,
Table 4-1
features of standard register description format.
Control register descriptions are arranged in alphabetical order according to the register mnemonic. More
information about control registers is presented in the context of various peripheral hardware descriptions in Part II
of this manual.
Table 4-1
Register Name
Locations D0-D2H are not mapped
Basic Timer Control Register
Clock Control Register
System Flags Register
Register Pointer 0
Register Pointer 1
Location D8H is not mapped
Stack Pointer register
Instruction Pointer (High Byte)
Instruction Pointer (Low Byte)
Interrupt Request register
Interrupt Mask Register
System Mode Register
Register Page Pointer
Port 0 data register
Port 1 data register
Port 2 data register
Port 0 interrupt control register
Port 0 control register (High byte)
System and Peripheral Control Registers Set1 Bank0
Mnemonic
BTCON
CLKCON
FLAGS
RP0
RP1
SPL
IPH
IPL
IRQ
IMR
SYM
PP
P0
P1
P2
P0INT
P0CONH
4-1
illustrates the important
Figure 4-1
Address and
Location
Address
R/W
7
D3H
R/W
0
D4H
R/W
0
D5H
R/W
x
D6H
R/W
1
D7H
R/W
1
D9H
R/W
x
DAH
R/W
x
DBH
R/W
x
DCH
R
0
DDH
R/W
x
DEH
R/W
0
DFH
R/W
0
E0H
R/W
–
E1H
R/W
–
E2H
R/W
0
E3H
R/W
–
E4H
R/W
–
4 CONTROL REGISTERS
RESET Value (Bit)
6
5
4
3
2
1
0
0
0
0
0
0
–
–
0
0
–
–
x
x
x
x
x
0
1
0
0
0
–
–
1
0
0
1
–
–
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
0
0
0
0
0
0
x
x
x
x
x
x
–
–
x
x
x
0
0
0
0
0
0
0
0
0
0
0
0
0
–
–
–
–
0
0
0
0
0
0
0
0
0
0
0
0
–
0
–
0
0
0
0
0
0
0
–
0
–
–
x
x
x
0
x
0
0
0
0
0
0
0
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