System Mode Register (Sym) - Samsung S3C8275X User Manual

S3C8275X/F8275X/C8278X/F8278X/C8274X/F8274X

SYSTEM MODE REGISTER (SYM)

The system mode register, SYM (set 1, DEH), is used to globally enable and disable interrupt processing and to
control fast interrupt processing (see Figure 5-5).
A reset clears SYM.1, and SYM.0 to "0". The 3-bit value for fast interrupt level selection, SYM.4−SYM.2, is
undetermined.
The instructions EI and DI enable and disable global interrupt processing, respectively, by modifying the bit 0
value of the SYM register. In order to enable interrupt processing an Enable Interrupt (EI) instruction must be
included in the initialization routine, which follows a reset operation. Although you can manipulate SYM.0 directly
to enable and disable interrupts during the normal operation, it is recommended to use the EI and DI instructions
for this purpose.
MSB
Always logic "0"
Not used for the
S3C8275X/C8278X/C8274X
NOTES:
1. You can select only one interrupt level at a time for fast interrupt processing.
2. Setting SYM.1 to "1" enables fast interrupt processing for the interrupt processing for the
interrupt level currently selected by SYM.2-SYM.4.
3. Following a reset, you must enable global interrupt processing by executing EI instruction
(not by writing a "1" to SYM.0)
System Mode Register (SYM)
DEH, Set 1, R/W
.7 .6 .5 .4
Fast interrupt level
selection bits:
0 0 0 = IRQ0
0 0 1 = IRQ1
0 1 0 = IRQ2
0 1 1 = IRQ3
1 0 0 = IRQ4
1 0 1 = IRQ5
1 1 0 = IRQ6
1 1 1 = IRQ7
Figure 5-5. System Mode Register (SYM)
.3 .2 .1 .0
Global interrupt enable bit:
0 = Disable all interrupts processing
1 = Enable all interrupts processing
Fast interrupt enable bit:
0 = Disable fast interrupts processing
1 = Enable fast interrupts processing
INTERRUPT STRUCTURE
LSB
5-9